Analog IC Design Intern within Marvell's Central Engineering team in Vancouver, performing schematic capture and layout in Cadence/Virtuoso, evaluating circuit topologies, running simulations, and supporting analog IP verification for DSP transceivers; candidate must be pursuing a PhD or MS in EE or related field.
What they are looking for
Details
- Work type
- Onsite
- Compensation
- Paid
- Remote eligible
- No
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