← All internships

ASIC TOP Floorplan Intern, 2027

NVIDIA

Shanghai · Posted Oct 19

Apply

At a glance

Location
Shanghai, China
Work type
Onsite
Category
Engineering

Intern ASIC TOP Floorplan Design Engineer at NVIDIA in Shanghai, China. Role focuses on developing and optimizing floorplans for early chip development, driving area reviews, solving timing and routing issues, and building/improving tools to optimize chip area and speed.

What they are looking for

VerilogSystemverilogC/c++PythonPerl

Get new Engineering internships by email

Similar roles

More at NVIDIA

Browse all internships More Engineering internships