NVIDIA

Design Verification Engineer (RDSS Intern)

NVIDIA

Hsinchu · Posted Sep 01

Engineering Onsite
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Design Verification Intern in NVIDIA's Multimedia IP team in Taiwan (Hsinchu). Responsible for development and verification of multimedia IP in GPU/SoC, applying SystemVerilog/UVM methodologies to verify builds, develop test plans, create and debug test cases, and measure coverage. Requires a master's degree in EE, CS, or CE or equivalent work experience; strong OOP and knowledge of AI-enabled automation workflows; familiarity with digital build principles.

What they are looking for

Systemverilog Uvm Cpp Python Tcl

Details

Work type
Onsite
Remote eligible
No

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