Neuralink

Digital IC Design Engineer Intern

Neuralink

Fremont · Posted Jan 18

$35/hr Engineering Onsite
Apply now

Digital IC Design Engineer Intern role in Fremont, CA focusing on low-power digital design and RTL implementation, hardware/software interfaces, and SoC verification for brain-computer interfaces; collaboration with chip designers and firmware/software engineers.

What they are looking for

Systemverilog C++ Python Digital signal processing Digital design

Details

Work type
Onsite
Compensation
Paid
Remote eligible
No

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