Qorvo

IC Layout Engineering Intern

Qorvo

Richardson · Posted Aug 31

$31–$42/hr Engineering Onsite
Apply now

Qorvo's IC Layout Engineer Internships are offered in the High Performance Analog business group. Specific projects and responsibilities are determined based on the business needs. Responsibilities may include complete physical implementation of RF, analog, and mixed-signal blocks; applying foundry PDK design rules and layout methodologies; floor planning; layout edits using Cadence Virtuoso; verification checks (DRC, LVS, ERC); tapeout activities; and learning about GaAs, Silicon, and GaN technologies.

What they are looking for

Cadence virtuoso Linux Python Perl Vlsi layout

Details

Work type
Onsite
Compensation
Paid
Visa sponsorship
Not offered
Remote eligible
No

Get new Engineering internships by email

Free daily digest, matched to what you pick. Unsubscribe anytime.