Intern - NAND Process and Equipment Engineer

Location: Fab 10N/X, Singapore

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Location

Micron F10, 1 North Coast Drive.

Department

Process and Equipment Engineering (Diffusion)

Project Title

F10 CMOS Matching and RegE Wafer Edge Exclusion Programme

Project Description

The Process and Equipment Engineering Intern will participate in an engineering project focused on CMOS matching analysis and wafer edge yield enhancement within advanced semiconductor manufacturing processes.

Working alongside Process and Equipment Engineers, the intern will gain hands-on exposure to yield learning methodologies, inline process monitoring, defect characterization, and data-driven manufacturing optimization. The project provides opportunities to investigate process variations, evaluate wafer edge performance, and develop analytical solutions that enhance manufacturing quality and yield performance.

The project combines semiconductor process engineering fundamentals with advanced data analytics, automation, and AI-enabled engineering tools to accelerate learning, improve engineering efficiency, and drive fact-based decision making.

The internship provides exposure to

Semiconductor manufacturing processes and process integration.

Yield analysis, defect characterization, and process monitoring methodologies.

Statistical analysis and data-driven engineering problem solving.

Automation, visualization, and AI-enabled engineering workflows.

Cross-functional collaboration across manufacturing, process, and yield engineering teams.

Objective of the Project

The intern will

Develop an understanding of CMOS matching methodologies and wafer edge performance analysis.

Analyze manufacturing, metrology, inspection, and defect data to identify yield improvement opportunities.

Evaluate factors contributing to process variation and yield mismatches across manufacturing populations.

Apply data analytics, automation, and AI-enabled solutions to improve engineering investigations and productivity.

Generate engineering recommendations that improve manufacturing performance and process learning.

Opportunities for Full Time Employment

High-performing interns may be considered for future full-time opportunities within Process and Equipment Engineering, subject to business needs, individual performance, and graduation requirements.

Project Scope

The intern will participate in activities such as

Studying CMOS matching behavior and wafer edge performance characteristics within semiconductor manufacturing processes.

Integrating process, inspection, defect, and metrology datasets to perform comprehensive engineering analysis.

Developing analytical methodologies to identify yield loss mechanisms and process improvement opportunities.

Creating automation, visualization, or AI-enabled tools that enhance engineering productivity and data interpretation.

Collaborating with cross-functional engineering teams to evaluate and validate improvement opportunities.

Learning Opportunities

Interns will gain valuable exposure to

Advanced semiconductor manufacturing and process engineering.

Yield enhancement methodologies and defectivity analysis techniques.

Statistical analysis, data visualization, and engineering problem-solving approaches.

Python programming, automation, and AI-enabled engineering applications.

Cross-functional collaboration within high-volume semiconductor manufacturing environments.

Deliverables

By the end of the internship, the intern will deliver

A technical assessment of CMOS matching performance, yield variation drivers, and improvement opportunities.

Data analysis and visualization solutions that improve engineering insight into wafer edge and yield behavior.

An analytical, automation, or AI-enabled solution that enhances engineering workflow efficiency or decision-making effectiveness.

Engineering recommendations that improve wafer edge performance, yield learning, and process optimization.

A final presentation and technical report summarizing methodology, findings, limitations, and future recommendations.

Impact of the Project

The project is expected to

Improve understanding of yield variation and wafer edge-related performance characteristics.

Demonstrate the value of analytics, automation, and AI-enabled tools within semiconductor manufacturing engineering workflows.

Contribute reusable methodologies that accelerate future yield improvement and manufacturing optimization initiatives.

Skillsets Required

Strong foundation in semiconductor process engineering, manufacturing science, or related engineering disciplines.

Knowledge of statistical analysis, data analytics, and engineering problem-solving methodologies.

Basic programming experience in Python, MATLAB, or similar analytical tools through coursework, research, or project work.

Familiarity with automation, data visualization, or AI-enabled engineering tools and workflows.

Strong analytical thinking, communication skills, ownership mindset, and ability to collaborate effectively within cross-functional engineering teams.

Preferred Qualifications

Coursework or project experience related to semiconductor manufacturing, process engineering, materials engineering, yield enhancement, or statistical process control.

Course of Interest

The ideal candidate should be pursuing Chemical Engineering, Materials Engineering, Electrical Engineering, Semiconductor Engineering, or related Engineering disciplines.

Duration of Period

The ideal candidate should be able to commit to a