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VLSI Logic Design Intern

HPE

Chippewa Falls · Posted Oct 13 · $35-$41/hr

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At a glance

Pay
$35-$41/hr
Location
Chippewa Falls, WI
Work type
Hybrid

Hybrid VLSI Logic Design Intern in Wisconsin. Responsibilities include assisting with VLSI/RTL design using System Verilog, creating SVAs and using Formal Verification, writing coverage analyses, and building scripts (Python, TCL, Perl) to improve design processes.

What they are looking for

System verilogSystem verilog assertionsFormal verificationPythonTcl

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