Engineering internships in San Jose, CA (2026)

15 open Engineering internships in San Jose, CA.

15+ open roles ~$7k/mo avg Western Digital, Qorvo, Figureai, Socotec, Didi

Geotechnical Engineering Summer 2027 Intern

Socotec

San Jose, CA, us · Sep 15

$20–$25/hr Engineering Onsite soil mechanics

Motion Planning Engineer (PhD, Intern) Top Pick

Didi

San Jose, CA · Sep 12

$46/hr Engineering Onsite motion planning c++

Policy Engineering Intern- Summer 2027 Top Pick

Veeamsoftware

San Jose, CA, USA · Sep 11

$40–$50/hr Engineering Onsite go ai tooling

Module Integration Design Engineering Intern Top Pick

Qorvo

San Jose, CA · Aug 31

$36–$48/hr Engineering Onsite rf design hfss

Analog Design Engineering Intern

Qorvo

San Jose, CA · Aug 31

$36–$48/hr Engineering Onsite cadence virtuoso python

Field Application Engineering Intern, Fall 2026, (LitePoint, San Jose, CA)

Teradyne

San Jose, CA · Aug 12

$25–$47/hr Engineering Onsite c cpp

Summer 2027 Intern - Hardware Engineering

Western Digital

San Jose, CA, us · Jul 31

Engineering Onsite verilog systemverilog

Summer 2027 Intern - Hardware Engineering

Western Digital

San Jose, CA, us · Jul 31

Engineering Onsite verilog systemverilog

Hardware Engineering Intern

Biotechne

San Jose, CA · Jul 14

$19–$26/hr Engineering Onsite python arduino

Fall 2026 Intern - IT Wafer Systems Automation

Western Digital

San Jose, CA, us · Jul 01

Engineering Onsite c# java

Fall 2026 Intern - IT Wafer Systems Automation

Western Digital

San Jose, CA, us · Jul 01

Engineering Onsite python java

Hardware Reliability Intern [Fall 2026]

Figureai

San Jose, CA · Jun 23

$35–$45/hr Engineering Onsite python c++

Application Engineer Intern Top Pick

Monolithic Power Systems

San Jose, CA · Jun 19

$40/hr Engineering Hybrid power electronics schematic capture

Electrical Engineering Intern [Fall 2026] Top Pick

Figureai

San Jose, CA · Apr 25

$40–$45/hr Engineering Onsite altium pcb design

Summer/ Fall 2026 - Circuit Design Research Intern(7339)

Ro

San Jose, CA · Apr 23

Engineering Hybrid circuit design chip tapeout flow

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