Ciena Canada ULC

ASIC Synthesis and STA Engineer - New Grad

Ciena Canada ULC

Ottawa · Posted Aug 28

$71k–$113k/yr Engineering Onsite
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New Grad ASIC Synthesis and STA Engineer role in Ottawa focusing on front-end implementation of ASIC technology, including synthesis, timing analysis, logical equivalence checking, clock domain crossing validation, ECOs, and collaboration with ASIC integration, IP development, physical design, and external EDA partners.

What they are looking for

Synthesis Timing analysis Logical equivalence checking Clock domain crossing Rtl design principles

Details

Work type
Onsite
Compensation
Paid

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