AS

Design Verification Engineer (Intern 2026)

Astera Labs Early

Toronto · Posted Jun 08

Engineering Onsite
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Join Astera Labs ASIC team as Design Verification Co-Op working on high-performance compute and networking standards in advanced CMOS process nodes. The ideal candidate will be passionate about silicon engineering with a background in VLSI and/or computer architecture. In this position you will be responsible for design and/or verification of blocks using leading-edge methodology and tools.

What they are looking for

Verilog Systemverilog Python Perl Cpp

Details

Work type
Onsite
Remote eligible
No

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