DFT Engineer Intern at ambarella focused on DFT feature development, automating DFT flows (Scan, Compression & MBIST) for complex multi-million gate SoC, verification of DFT logic and fault coverage, and timing analysis for DFT modes.
What they are looking for
Dft
Verilog
Static timing analysis
Logic design
Scripting
Details
- Work type
- Onsite
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