Cadence Design Systems

Intern: Application Engineering - Formal Verification

Cadence Design Systems

Belo Horizonte · Posted Jun 09

Engineering Onsite
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Intern: Application Engineer Intern in Belo Horizonte, Brazil. Training to become an expert in Formal Verification methodologies in Cadence's System Verification Group, with hands-on work on Jasper Formal Verification Platform and related tools (Xcelium, Palladium, Protium, VIPs). Mentored to learn TCL scripting and verification methodologies, and to provide technical support to customers and field personnel.

What they are looking for

Tcl Python Verilog Vhdl

Details

Work type
Onsite

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