Intern - Probe Automation

Location: Fab 10N/X, Singapore

Our vision is to transform how the world uses information to enrich life for all.

Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing.

Location

F10NX

Department

Probe

Project Title

Move Table Optimizer: Applied Artificial Intelligence for Wafer Test Optimization

Project Description

Develop an applied Artificial Intelligence solution that automatically generates optimized wafer test movement configurations.

During wafer testing, a probe card moves across the wafer to contact and test each die. The movement sequence must cover all required dies using as few contacts as possible. This represents a constrained coverage and sequencing problem that is currently optimized manually on a case-by-case basis.

The intern will apply optimization, machine learning, and software engineering techniques to develop an optimization engine and a web application for engineers to visualize, compare, and evaluate recommended configurations. The project provides practical exposure to Artificial Intelligence-enabled optimization, web application development, and semiconductor wafer probe testing.

Objective of the Project

Develop an optimization engine that generates and ranks wafer test movement configurations.

Reduce the manual effort required to evaluate individual wafer test cases.

Enable engineers to visualize and compare recommended configurations through a web application.

Quantify potential improvements in test time and tester utilization using representative production cases.

Opportunities for Full Time Employment

High-performing interns may be considered for future internship or full-time employment opportunities, subject to business needs, role availability, and the applicable selection process.

Project Scope

Apply optimization and machine learning techniques to generate and rank wafer test movement configurations.

Analyze historical configuration data and benchmark model results against manually optimized configurations.

Develop a web application for engineers to visualize, compare, and select recommended configurations.

Validate the recommendations using representative production cases and quantify the improvements achieved.

Learning Opportunities

Develop an applied Artificial Intelligence solution from problem formulation through model development, application integration, and validation.

Gain experience working with real semiconductor manufacturing data and practical engineering constraints.

Build hands-on knowledge of semiconductor wafer probe testing in a high-volume manufacturing environment.

Collaborate with cross-functional Automation, Equipment, and Engineering teams.

Deliverables

An optimization engine that generates and ranks wafer test movement configurations.

A web application featuring wafer visualization and side-by-side comparison of recommended configurations and potential savings.

A validation report documenting the methodology, results, limitations, and quantified improvements.

Impact of the Project

A previous manual optimization study for one product reduced the number of contacts per wafer by two, resulting in a 7.14% reduction in test time for that product.

As manual optimization limits the number of cases that can be evaluated, automating the process could make similar optimization methods repeatable across a broader product mix. The solution has the potential to shorten test time, improve tester utilization, and provide engineers with a consistent method for evaluating wafer test movement configurations.

Skillsets Required

Strong analytical, problem-solving, and software engineering skills.

Experience with Python, Linux, Angular, and Structured Query Language.

Familiarity with machine learning, optimization libraries, or Artificial Intelligence-enabled workflows.

Exposure to combinatorial optimization, coverage optimization, sequencing, or path-planning problems is an advantage.

Course of Interest

The ideal candidate should be pursuing a degree in Computer Science, Computer Engineering, Electrical and Electronic Engineering, Mechatronics Engineering, or a related field.

Duration of Period

The ideal candidate should be able to commit to a full time internship period of at least 5 months.

About Micron Technology, Inc.

We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all. With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience.

To learn more, please visit micron.com/careers

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.

To request assistance with the application process and/or for reasonable accommodations, please contact [email protected]

Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.

Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.

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