Junior Physical Design Engineer in Italy (Catania) to learn and support the RTL-to-GDSII physical implementation flow for complex SoC/MCU designs on advanced nodes. Responsibilities include floorplanning, P&R, CTS, DRC/LVS/antenna, STA, and scripting (TCL, Python, Perl). Collaborate with RTL/DFT/Analog teams and learn state-of-the-art EDA tools; English required; strong curiosity and teamwork.
What they are looking for
Details
- Work type
- Onsite
- Compensation
- Paid
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